Our laboratory proposes an AI-optimized algorithm for advanced display technology and utilizes digital IC logic design techniques on FPGA development boards to implement it, aiming to improve the quality of display screens. Among OLED-related display technologies, active matrix organic light-emitting diodes (AMOLEDs) have garnered significant attention. AMOLEDs offer advantages such as thinness, high contrast, and wide viewing angles, making them widely applicable, as shown in Figure 1. However, TFT and OLED components gradually age with operation, leading to phenomena such as burn-in and mura on panels. Additionally, non-ideal effects such as temperature, parasitic capacitance, and optical crosstalk can degrade display quality. Although AMOLED pixel compensation circuits have certain compensatory functions, their effectiveness is limited. Therefore, combining external compensation mechanisms with AI technology becomes a new direction. By training AI models with brightness data measured from actual panels, the AI model can directly predict post-degradation brightness, and then feedback compensation values generated by external ICs to the pixel circuitry. This approach addresses complex non-ideal effects through deep learning to improve panel uniformity and mitigate OLED display burn-in issues. To experimentally verify the feasibility of this method on displays, we will write RTL code on FPGA development boards to implement external IC compensation and integrate it with the panel to form a complete system for validation of the results.

In recent years, high-definition AMOLED displays have become the market standard. However, despite the initial compensatory measures in AMOLED pixel circuits aimed at mitigating Thin-Film Transistor (TFT) and OLED aging, as well as variations between individual components, their efficacy remains limited. For example, in the case of the widely used 7T1C pixel compensation circuit (see Figure 2), several challenges emerge:

1. Variations in TFT electrical characteristics stemming from manufacturing process disparities lead to disparate compensation effects among pixels, resulting in the appearance of mura phenomena on the display.
2. TFT aging over time causes a drift in threshold voltage, resulting in variations in bias voltage duration, magnitude, and susceptibility to temperature, leading to burn-in phenomena in the displayed image.
3. OLED aging over time results in an increase in turn-on voltage and a decrease in luminous efficiency, reducing the drive transistors' ability to control drive current. This leads to individual pixels failing to achieve the expected brightness, resulting in burn-in phenomena in the output image.

Figure. 2. 7T1C compensation circuit

To address the aforementioned issues, our lab has developed an external compensation algorithm described as follows:

1. Establishing an AI Compensation Algorithm for AMOLED Aging and Deburn-in

To capture the aging trend of AMOLED panels, we partition the panel and apply varying levels of bias voltage. Long-term measurements are taken using a camera to gather luminance decay data under different gray levels (see Figure 3). We propose a luminance decay fitting equation that, unlike other common luminance prediction methods, considers both OLED aging and TFT threshold voltage drift, thus more accurately reflecting the actual panel's behavior. Additionally, by fitting the measured data, we increase the required data volume and reduce luminance measurement errors. Combining this with the developed AI model, we establish a luminance decay prediction method. Ultimately, we apply appropriate compensation to the predicted luminance, completing the deburn-in compensation mechanism, which mitigates panel aging issues and extends the display's lifespan.



Figure. 3. AMOLED Aging Experiment Platform



Figure. 4. Neural Network Architecture

2. Establishing an AMOLED Measurement Platform and Demura External Compensation Mechanism

Using the AMOLED measurement platform and a camera, we capture luminance data of the images (see Figure 5). A regression model is employed to analyze and establish an external compensation mechanism for mura phenomena caused by manufacturing process variations. Since the human eye is more sensitive to changes in low gray levels than high gray levels, our compensation algorithm corrects for this by allocating more resources to compensating for errors in low gray levels. This ensures a display output that is more visually comfortable. To verify the compensation's effectiveness, we write the compensated correction voltage into the panel and re-measure the corrected panel luminance, revealing significant improvement in mura phenomena and enhanced display uniformity, thereby demonstrating the feasibility of the compensation algorithm.



Figure. 5. AMOLED Measurement Platform

3. Verifying the Feasibility of Digital IC External Compensation Using FPGA

The established external compensation mechanism is implemented through FPGA to realize the functions of a digital IC. Integrating the panel's timing controller (TCON) and data voltage IC, the compensation voltage is fed to the gate terminal of the pixel circuit's drive transistor through the data voltage IC, addressing the mura and burn-in issues of the panel. The newly developed external demura and deburn-in compensation mechanism compensates for the inherent defects of the TFT process, solving practical application problems. Ultimately, it ensures that the luminance produced by AMOLED pixels is unaffected by variations in TFT and OLED component characteristics, thus achieving a high-quality AMOLED display.



Figure. 6. RTL Algorithm Flowchart